Reference circuits generate reference voltages used in a variety of semiconductor applications, including digital and analog devices. Maintaining the accuracy of these semiconductor applications is directly dependent on the stability of a reference voltage. A stable reference voltage immune to temperature variations, power supply variations and noise is required for high performance digital or analog components. For example, the conversion accuracy of signals from analog to digital and vice versa is directly dependent on accuracy of an internal reference which is typically a voltage reference which tolerates power supply variations and noise as well as temperature variations.
A typical solution to the internal voltage reference is a bandgap voltage reference or a bandgap circuit. Ideal bandgap voltage references provide a predetermined output voltage substantially invariant with respect to variations in temperature. The bandgap voltage reference is generated by adding the voltage of a forward-biased PN junction having a negative temperature coefficient to a voltage difference of two forward-biased base-emitter PN junctions having a positive temperature coefficient.
For example, a bandgap reference is disclosed in U.S. Pat. No. 5,512,817, and is shown in PRIOR ART FIG. 1. Referring to PRIOR ART FIG. 1, the bandgap voltage reference circuit comprises a current source, a simple bandgap voltage reference supply circuit 100 which can produce an output bandgap voltage VBG, a high gain amplifier circuit 120 and a voltage regulator composed of a FET 142. The band gap voltage reference supply circuit 100 has virtually no power supply rejection ratio (PSRR), which is defined as the ratio of the change in external power supply VDD to the change in bandgap voltage VBG. The current source comprises field-effect transistors (FET) 138, 140 and 144 and couples to power source VDD. The power supply voltage VDD is supplied through FET 138 to node Nr which has a voltage Vr that is equal to VDD reduced by the voltage drop across FET 138. The bandgap voltage reference supply circuit 100 comprises FETs 102, 104 and 106, transistors 108 and 110, and resistors 112 and 114. In order to increase the power supply rejection ratio (PSRR) of the whole circuit, the voltage signal generated by the bandgap voltage reference supply circuit 100 is amplified by a high gain amplifier circuit 120 comprising FETs 122, 124, 126, 128, 130, 132, 134, 136 and capacitor 121. A cascode circuit is used in the high gain amplifier circuit 120.
The bandgap voltage reference circuit disclosed in U.S. Pat. No. 5,512,817 suffers from a high voltage power supply and large chip-area requirement. The circuit shown in PRIOR ART FIG. 1 is provided with the cascode circuit to increase the PSRR with its high amplification capability and to eliminate the fluctuations of VDD. Unfortunately, cascode circuits must be connected in series with other reference circuit components between the power supply and ground. Thus, such cascode configuration reduces the voltage headroom available in the circuit.
Another approach in the prior art is to provide a pre-regulated voltage supplied to the bandgap circuit. However, the circuit associated with the pre-regulation voltage consumes more power, chip-area and increases the complexity of the circuit.
Further, in order to generate multiple output reference voltages, the output voltage of the bandgap circuits generally need be buffered by an amplifier to provide power to a voltage divider which generates multiple output reference voltages. An exemplary circuit which includes a unity-gain voltage buffer 250 and a resistor-divider load 252 is shown in PRIOR ART FIG. 2. The resistor-divider load 252 comprising resistors 254, 256 and 258 is coupled between a node 260 where bandgap voltage VBG is outputted and a common node GNDA. Since the bandgap voltage is buffered by the unity-gain voltage buffer 250, the output voltage of the buffer is equal to the input bandgap voltage but the output current drive capability is higher. Thus, it can generate multiple output reference voltages VREF2 and VREF3 at nodes 262 and 264 as shown in PRIOR ART FIG. 2.
In some applications, outputting reference voltages above the bandage voltage may be desired. To meet this requirement, an alternative exemplary circuit which comprises a voltage buffer 350 and a voltage divider 352 shown in PRIOR ART FIG. 3 may be employed. The voltage buffer 350, resistor 320 and resistor 322 are used to amplify the reference voltage VBG to obtain a voltage higher than the bandage voltage. The voltage divider 352 comprises resistors 354, 356 and 358 for generating multiple reference voltages VREF1, VREF2 and VREF3 at nodes 360, 362 and 364 as shown in PRIOR ART FIG. 3. However, the power and chip area will be further consumed by using the voltage buffer.
Another disadvantage of the bandgap voltage reference circuit shown in PRIOR ART FIG. 1 is the input-referred offset voltage of the high gain amplifier circuit, VOS. The effect can be calculated in Equation (1) as follows:
                                          V            BG                    =                                    V                              BE                ⁢                                                                  ⁢                110                                      +            N                          ⁣                                                            R                114                                            R                112                                      ⁢                          ln              ⁡                              [                                  M                  ⁡                                      (                                          N                      +                      1                                        )                                                  ]                                      ⁢                          V              T                                -          N                ⁣                                            R              114                                      R              112                                ⁢                      V            OS                                              (        1        )            Where M is the ratio of the sizes of transistors 108 and 110, N is the ratio of the sizes of FETs 106 and 104, and VBE110 is the base-emitter voltage of the transistor 110. As shown in Equation (1), the offset voltage VOS is amplified, and thus error may be introduced into the bandgap voltage VBG. More importantly, the input-referred offset voltage VOS varies with temperature, and raises the temperature coefficient of the output voltage. In order to lower the effect of the input-referred offset voltage, the high gain amplifier needs to incorporate large devices in a carefully chosen topology so as to minimize the offset. Thus, the chip area requirement is further increased.